Phase locked loop (PLL) is an important component in communication. Nowadays, all-digital PLL (ADPLL) has been researched and developed to replace analog PLL because ADPLL is free from large analog loop filters and passive elements. Time-to-digital converter (TDC) in ADPLL replaces phase detector and charge pump, and functions to detect phase difference between a control signal of ADPLL and a reference clock signal. TDC is often used in high-speed communication systems and affects the resolution of APDLL and noise performance.
Like reference symbols in the various drawings indicate like elements.